New PDF release: 14.Computers

By John G. Webster (Editor)

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2] select one of the 64 double-word registers of the complete configuration space to be read from or written to. In the case of an add-on card for a PC, each configuration transaction is a two-step process. A double-word specifying the nature of the transaction and the transaction address is first written by the PC to I/O space locations 0CF8h through 0CFBh, and the data are then transferred using I/O space locations 0CFCh through 0CFFh. Although a PCI add-on card must be capable of operating at a minimum 33 MHz clock frequency, it is desirable that it should also operate correctly at slower speeds down to 0 Hz for debugging and power saving purposes.

Otherwise, consider the triangle vivkvj for some k. This divides the remaining part of the polygon ͗vi, . , vj͘ into two subpolygons, ͗vi, . , vk͘ and ͗vk, . , vj͘. Thus, Tij ϭ minjϪ1 kϭiϩ1(Tik ϩ Tkj ϩ perimeter of ⌬vivkvj). The quantities Tik and Tkj have already been computed, so Tij can be evaluated in time ␪( j Ϫ i Ϫ 1). Therefore, this is an O(n3)-time algorithm, but one that computes only the weight of an optimal triangulation. However, the triangulation itself can also be easily constructed by storing, for all i, j, the value of k that minimizes the previous expression for Tij.

The configuration software has to find an address in this range which does not select a legacy card and then tell all the plug-andplay cards the actual address of this port. The bottom 6 bits of a byte written to the address port access one of 64 eightbit registers whose contents can be read via the read data port or overwritten via the write data port. These registers form the bottom quarter of the 256-byte configuration register space shown in Fig. 11. The card wakeup call mentioned earlier in the overview consists of writing 03h to the address port and 00h to the write data port, following which all cards with nonassigned CSNs wakeup.

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14.Computers by John G. Webster (Editor)


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